You might benefit by reading about lisp machine designs (and about 64-bit
architectures). You can also read about 64 bit lisps, which have been
available from franz.com and lispworks.com on appropriate hardware, for some
years. It is unclear to me what the status is of a 64-bit SBCL port, or if
there are others out there.
If the car/cdr occupy adjacent 64-bit storage locations, accessing either of
them will probably bring the other one into high-speed cache memory.
I expect that a 64-bit lisp implementation would use much more than 32 bits
per pointer. Though probably not all the 64 bits need to be used for
addresses.
That would allow for 1.8 X 10^19 cons cells, which seems excessive. Or 16X
that, if you use cell-addresses instead of byte-addresses. Even using bytes,
this is about 3X 10^20 bytes of memory, or about 68,000,000,000 gigabytes,
if I am computing this right.
Trying to buy, attach, and power-up so much RAM would be a challenge.
_____
From: maxima-bounces at math.utexas.edu [mailto:maxima-bounces at math.utexas.edu]
On Behalf Of apeditedirra unasaltao
Sent: Saturday, September 22, 2007 8:45 AM
To: maxima at math.utexas.edu
Subject: 64bits, 32 for car, 32 for cdr
I apologize for my 64 bits idea.
I was thinking in a machine such that:
a word (64 bits) encode the car and the cdr each 32 bits long.
In one cycle of the clock the computer gets both data:
the car data located in a 32 bit space and the cdr located in another
32 bit data.
The adventage i see is that you never spend time looking for the cdr,
is always there. That is
With (first l) you get at the same time (first l) and (second l) in
paralell.
Then, when you do (third l) you get at the same time (third l) and
(fourth l)
and so on.
I don't know anything about Lisp machines, but something like this must be
there, but know it doesn't seem difficult to adapt a 64 bit computer to get
this.
Any venture capital to construct such a machine? :))
_____
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